Reading time ( words)
Applied Materials, Inc. and BE Semiconductor Industries N.V. announced an agreement to develop the industry’s first complete and proven equipment solution for die-based hybrid bonding, an emerging chip-to-chip interconnect technology that enables heterogeneous chip and subsystem designs for applications including high-performance computing, AI and 5G.
As traditional 2D scaling slows, the semiconductor industry is shifting towards heterogeneous design and chip integration as a new way to deliver improvements in performance, power, area/cost and time-to-market (PPACt). To accelerate this trend, Applied and Besi have formed a joint development program and are establishing a Center of Excellence focused on next-generation chip-to-chip bonding technology. The program harnesses the companies’ respective front- and back-end semiconductor expertise to deliver co-optimized integrated hybrid bonding configurations and equipment solutions for customers.
“Challenges in conventional Moore’s Law scaling are straining the economics and pace of the semiconductor industry’s roadmap,” said Nirmalya Maity, Corporate Vice President of Advanced Packaging at Applied Materials. “Our collaboration with Besi and the formation of a new Hybrid Bonding Center of Excellence are key components of Applied’s strategy to equip customers with a ‘New Playbook’ for driving improvements in PPACt. Applied looks forward to working with Besi to co-optimize our equipment offerings and accelerate advanced heterogeneous integration technology for our customers.”
“We are excited about forming this unique joint development program with Applied Materials which brings together the semiconductor industry’s leading materials engineering and advanced packaging technologies for customers,” said Ruurd Boomsma, CTO of Besi. “Our collaboration can greatly accelerate the adoption and proliferation of hybrid bonding for leading-edge 5G, AI, high-performance computing, data storage and automotive applications.”
Hybrid bonding connects multiple “chiplets” in die form using direct, copper interconnects. This technique enables designers to bring chiplets of various process nodes and technologies into closer physical and electrical proximity so that they perform as well or better than if they were made on a single large, monolithic die. Hybrid bonding is a major improvement over conventional chip packaging because it permits increased chip density and shortens the lengths of the interconnect wiring between chiplets, thereby improving overall performance, power, efficiency and cost.
A complete die-based hybrid bonding equipment solution requires a broad suite of semiconductor manufacturing technologies along with high-speed and extremely precise chiplet placement technology. To achieve this, the joint development program brings together Applied’s semiconductor process expertise in etch, planarization, deposition, wafer cleaning, metrology, inspection and particle defect control with Besi’s leading die placement, interconnect and assembly solutions.
The Center of Excellence will be located at Applied’s Advanced Packaging Development Center in Singapore which is one of the industry’s most advanced wafer-level packaging labs. It enables the foundational building blocks of heterogenous integration in a 17,300-square-foot Class 10 cleanroom with full lines of wafer-level packaging equipment. The Center of Excellence will provide customers a platform to accelerate the development of custom hybrid bonding test vehicles including design, modeling, simulation, fabrication and testing.