SkyWater and MIT Begin Second Phase of DARPA-funded 3DSoC Program
August 21, 2020 | Business WireEstimated reading time: 2 minutes
SkyWater Technology, the trusted technology realization partner, announced the DARPA Three Dimensional Monolithic System-on-a-Chip (3DSoC) program, in collaboration with Massachusetts Institute of Technology (MIT), has entered its second phase. After completing the program’s initial phase, focused on transferring the Carbon Nanotube Field Effect Transistor (CNFET)-based 3DSoC technology into SkyWater’s 200 mm production facility, phase two will focus on refining manufacturing quality, yield, performance, and density; key elements of commercial viability. The 3DSoC program aims to shift cost/performance benchmarks that have been the standard for decades. This new paradigm is expected to accelerate AI and advanced computing across use cases in autonomous vehicles, medical/healthcare diagnostics, edge computing, wearables, and IoT applications.
The DARPA 3DSoC program, which began in 2018, has realized several technical achievements after running a wide variety of test chips to improve CNT manufacturability and reliability. A 3DSoC program update will be presented by MIT professor, Dr. Max Shulaker at the virtual 2020 DARPA Electronics Resurgence Initiative (ERI) Summit on August 20th. The program team’s work on the 3DSoC program was presented in June at the virtual 2020 Symposia on VLSI Technology and Circuits, highlighting BEOL monolithic 3D integration of CNFETs + RRAM and first hardware demonstrations of the monolithically integrated 3DSoC technology with SRAM and RISC-V compute core. The update also covered the team’s development of an industrial-grade foundry process design kit (PDK) for the 3DSoC technology platform, which marks a significant milestone to enable customer designs in SkyWater’s Early Access Program.
Additionally, the work on foundry integration by MIT and SkyWater was published recently in Nature Electronics demonstrating the methodologies employed to volume manufacture CNTs on 200 mm wafers in the same commercial facilities that fabricate silicon-based transistors. This important step in taking CNTs from the lab to the factory floor paves the way for more energy efficient, 3D microprocessors.
Notably, the technology enables the ability to monolithically integrate stackable tiers of CNT-based logic and RRAM to realize a high-density, high-bandwidth SoC architecture, all with low temperature fabrication techniques. While this is anticipated to accelerate AI and advanced computing, it also opens new dimensions of innovation and potentially enables backend logic integration with non-silicon substrates. This development would bring new possibilities for monolithic heterogeneous integration, which will lead to on-chip logic for new imaging, smart sensors, power management, and many other undiscovered applications.
“We are excited to continue this journey with MIT to fulfill the unique promise of carbon nanotube technology to the semiconductor industry, with disruptive implications for artificial intelligence and leading-edge computing applications across commercial and defense industries,” said Dr. Brad Ferguson, SkyWater Chief Technology Officer.
Added Thomas Sonderman, SkyWater President, “This program is proving the viability and scalability of CNFETs and demonstrates SkyWater’s broader commitment to support the resurgence of advanced manufacturing capabilities in the U.S.”
“It is really exciting to take this giant step forward and hit milestones inside of a foundry environment, making this leap into production. This marks a time for the industry to take notice of CNTs as a much more energy efficient alternative than silicon-based transistors and prepare product roadmaps for this disruptive technology,” said Dr. Max Shulaker, MIT Professor of Electrical Engineering and Computer Science.
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