Global Technology Development: HDP User Group European Meeting 2016


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Delighted and honoured to be invited again to attend the open session of the High Density Packaging User Group (HDPUG) European Meeting, I made my way to the picturesque Grand Duchy of Luxembourg, a tiny principality bordered by Belgium, France and Germany, and ranked among the world's top-three nations in both wealth and wine consumption, to learn about the latest in collaborative research and development by member companies engaged in the manufacture of products utilising high-density electronic packages.

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Marshall_Andrews.jpgHDP User Group Executive Director Marshall Andrews welcomed members and guests, and re-stated the mission of the group - to reduce the costs and risks for the electronics industries by improving cooperation between system integrators, contract assembly manufacturers and suppliers in the high-density packaging development and design process, using member resources and running activities in a domain where members gain much more by joint activities than by duplication of work by individual  companies—with clearly understood ground rules: "We do not discuss IP and we do not discuss price!"

John_Davignon.jpgOpening the proceedings with a session on assembly and lead-free projects, HDP User Group European Representative Alun Morgan introduced project facilitator John Davignon, who gave an update on Phase 2 of the Low/No-Silver Alloy Solder Paste project. Successful assembly results had been achieved both with "low temperature" (< 217°C melting point) and "high temperature" (> 217°C melting point) paste formulations, although a significant influence of flux had been observed, but little reliability data existed, so this was the focus of Phase 2. Ten different low/no-silver alloys had been selected for the study, five each of high temperature and low temperature, with 16 each of small and large BGA components, on the same test vehicle design as previously used, with an OSP finish. The assemblies would be subjected to a -40+125°C thermal cycle with 10–15 minutes dwell, with continuous monitoring and failures removed as they occurred. Component procurement was currently in progress, for assembly in Q3 2016. Testing was scheduled to commence in Q4 2016, with cross-section and failure analysis and correlation of results by Q2 2017. There were fifteen partners in the project, with broad representation from EMS companies and solder paste suppliers.

Larry_Marcanti.jpgProject Facilitator Larry Marcanti gave an update on the Harsh Use Environment (HUE) Alloy Evaluation Definition Project, now being conducted in collaboration with iNEMI. A list of proprietary high-reliability, lead-free alloys had been identified, with generic SAC305 as the industry baseline, and four temperature cycle ranges had been agreed: -55+150°C, -55+125°C, -40 +120°C and 0+100°C. A second test vehicle was proposed, to study the effect of solder joint geometry, and candidate designs were currently being sought. It was also proposed to carry out a programme of shock and vibration testing, although it was clear that this would be very product-specific, and Boeing had offered to advise on test vehicle design. There were already eighteen partners in the project, and more were welcome to contact Marcanti if they were interested in participating.

The next presentation was a call-in from Mei-Ming Khaw of Keysight Technologies in Malaysia, with an update on Revision 2 of the Effect of Component Rework on Reliability project. The objective was to establish improved guidelines for the number of allowable rework cycles on BGAs on an assembly without impacting the overall reliability of the assembly, with a view to proposing a new rework specification to the IPC committee. Previous studies by iNEMI and CALCE had yielded a baseline of information, and Cisco had demonstrated that via-in-pad copper cap thickness was a critical factor. Current work in Keysight was concentrated on studying temperature distribution and secondary reflow effects on neighbouring components at various separation distances, illustrated with several case-study examples incorporating a wide range of PCB and component variables. Keysight’s comprehensive test schedule included cross-sectioning to check for intermetallic thickness, grain structure, evidence of secondary reflow and copper dissolution, scanning acoustic microscopy to detect PCB delamination on inner and outer layers, 5DX X-ray detection of voids in BGA balls, electrical resistance and continuity testing, accelerated thermal cycling and shock/drop testing. Fifteen collaborators were participating in the project.

Sven_Simon.jpgThe session on high-frequency projects was led by HDP User Group project facilitator Dave Love, who introduced Professor Sven Simon from the University of Stuttgart to report the status of the X-Ray Tomography and Signal Integrity project, which was at the definition stage. Professor Simon explained how high-resolution x-ray tomography offered a non-destructive alternative to complex microsectioning for characterising and measuring the conductor geometry of high-frequency designs, by combining hundreds of X-ray images to build a three-dimensional model of the test coupon and extract manufacturing tolerance data which would correlate tested Dk and Df values to actual geometries. The university’s industrial CT scanner had been upgraded with an advanced detector assembly and could now achieve 1.5-micron resolution. Test coupons from the High-Frequency Materials project had been sent to the university after completion of Df and Dk testing, with the objective of generating manufacturing tolerance data, importing the geometrical data into 3D electrical models and outputting S-Parameters for the test coupon circuits, then collaborating with HDP User Group to publish the results.

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