Latent Short Circuit Failure in High-Rel PCBs due to Cleanliness of PCB Processes and Base Materials


Reading time ( words)

Latent short circuit failures have been observed during testing of PCBs for power distribution of spacecraft of the European Space Agency. Root cause analysis indicates that foreign fibers may have contaminated the PCB laminate. These fibers can provide a pathway for electromigration if they bridge the clearance between nets of different potential in the  presence of humidity attracted by the hygroscopic laminate resin. PCB manufacturers report poor yield caused by contamination embedded in laminate. Inspections show that fiber contamination is present on prepreg and etched innerlayers. Further fiber contamination may be attracted in the manufacturing environment due to static charging. The requirements for cleanliness that are specified for final PCBs are orders of magnitude more stringent than

those specified for base materials. This paper describes inspections performed on base materials, manufacturing processes and final PCBs. It describes test methods that detect reduced insulation caused by contamination and electromigration. Moreover, a proposal is presented specifying tightened requirements for a new class of base materials for the manufacture of high-reliability PCBs.

I. Introduction

Latent short circuit failures have been observed in PCBs during testing of power distribution units of spacecraft for the European Space Agency (ESA). Root cause analysis has been conducted under review of non-conformance review boards (NRB). Printed circuit board assemblies failed after prolonged functional testing in ambient laboratory environment or after thermal vacuum cycles. Due to the large amount of damage caused by the electrical overstress, it was not possible to obtain direct evidence of the failure. However, a working hypothesis has been developed indicating that fiber contamination may have caused a latent short circuit. This hypothesis was further substantiated by reports on contamination issues in base materials and by a test method that demonstrated the breach of insulation due to fiber contamination.

At the time of the observed failures at equipment level, PCB manufacturers reported poor cleanliness levels of base laminate materials, causing poor yield. It is not possible to screen in an efficient manner for contamination in copper-clad laminate, since visual inspection requires stripping of the copper. Several inspection methods show the lack of cleanliness of base materials, which is specified in IPC4101[8]. This paper identifies a major gap between the requirements specified on base materials and the requirements on manufactured PCBs and presents a proposal for a new class of cleaner base materials for the manufacture of high-rel PCBs.

Read the full article here.

 

Editor's Note: This article originally appeared in the August 2015 issue of The PCB Magazine.

Share

Print


Suggested Items

Communication, Part 4: The Top 5 Causes of Engineering Delays

10/25/2019 | Steve Williams, The Right Approach Consulting LLC
In Part 4 of this series on how PCB fabricators and designers can better communicate, Bob Chandler from CA Design and Mark Thompson from Prototron Circuits address the top five causes of engineer delays.

Why Designers Need to Be at the SMTA Additive Electronics Conference

10/18/2019 | I-Connect007
In a recent interview, Kelly Dack and Tara Dunn (Omni PCB president and conference co-chair) discussed why designers need to attend the SMTA Additive Electronics Conference. Tara will also be attending and moderating a panel discussion at the conference.

Additive Electronics Conference Set for October 2019 Debut

10/15/2019 | Kelly Dack
Kelly Dack and Tara Dunn talk about the upcoming conference "Additive Electronics: PCB Scale to IC Scale" on October 24, 2019, hosted by SMTA in San Jose, California, and why it's an important event for people to attend—especially those involved in the design process.



Copyright © 2019 I-Connect007. All rights reserved.