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Continuing with Part 5 of the discussion on understanding the military PCB performance standard MIL-PRF-31032, I will discuss the remaining three new procedures to address the unique requirements of the military.
Verification Test and Inspection Methods
The purpose of this document is to indicate which verification tests shall be done in-house and by the DLA approved outside test facility. Tables 1 and 2 outline the inspections and tests that are performed internally and externally.
Table 1: In-house testing.
Table 2: Outsourced testing.
This procedure provides a process that allows a company to modify, reduce, or eliminate testing using the best commercial practices available while still assuring all specified performance, quality, and reliability requirements are met. While test optimization is not a mandatory part of the specification, when applicable, this process specifies the steps taken to ensure compliance to MIL-PRF-31032 Appendix D.
General Information for Test Optimization
Unless otherwise specified by the printed board procurement documentation, a company may modify, substitute, or delete the tests and inspections defined in the applicable specification sheet. This is accomplished by baselining a flow of tests and inspections that will ensure that the PCBs are capable of meeting the generic verifications provided in the applicable specification sheet. The TRB team is responsible for ensuring that the PCBs are capable of meeting the performance requirements applicable to each specific PCB technology.
Methods of Test Optimization
The reduction of testing and/or sampling includes a reduction in the number of samples or test frequency, whether it is within a lot of periodic sampling. The modification of any tests includes using alternate test procedures, equipment, or test vehicles to achieve the same evaluation as the baseline verification method.
Test Optimization Program Requirements
A company must maintain the established process controls and evaluate the effect on the quality and reliability of any out-of-control conditions that may exist at critical process parameters. If a process changes, test optimizations currently in place must be assessed to determine if they are still valid and effective.
Another caveat to using a test optimization plan is that an evaluation must be performed to determine if a relationship exists between any processes used to optimize test and any customer returns or failure trends. Changes in a company’s baseline test plan to include test optimization are considered major changes and thus require notification to the qualifying activity.
Critical Process Parameters
When deciding whether to eliminate a test, the following should be considered, as a minimum:
- Variables critical to test outcome, called critical process parameters, should be identified and are in-control in accordance with the process control plan
- Assignable causes are understood and controlled at critical process parameters
- Critical process parameters have exhibited sufficient capability to ensure low printed board defect rates
Test Optimization Correlation, Confirmation, and Implementation
The TRB team and qualifying activity shall approve any test optimization used in lieu of required testing activity and need to document the specific areas of correlation between the alternate method and the applicable specification sheet requirement it replaces. The following is a typical flow:
- Identify candidate requirements of the applicable specification sheet for test optimization
- Using data, identify any correlations between the candidate requirements and the potential alternate method(s)
- Where correlation exists, develop and document alternative method(s)
- Accumulate data off-line to confirm the capability of the test optimization to ensure that the requirements are met
- Submit test optimization for TRB approval
- Submit test optimization for qualifying activity approval
- Implement the test optimization
Test optimization should be periodically assessed by the TRB to ensure its continued effectiveness. This periodic assessment is a tool for the TRB to aid in monitoring and maintaining product quality. Methods for periodic assessment may include stress-to-failure tests, failure mode analysis, analytic prediction modeling, etc. If test optimization is determined to no longer meet the initial requirements, the manufacturer should implement the appropriate baseline testing step previously approved by the TRB.
This wraps up the verification test and inspection methods and test optimization procedures, with Part 6 focusing on the last unique procedure needed to produce MIL-PRF-31032 PCBs and PCI and CVI Inspection.
Anaya Vardya is president and CEO of American Standard Circuits; co-author of The Printed Circuit Designer’s Guide to… Fundamentals of RF/Microwave PCBs and Flex and Rigid-Flex Fundamentals; and author of Thermal Management: A Fabricator's Perspective. Visit I-007eBooks.com to download these and other free, educational titles. He also co-authored “Fundamentals of PCB Technology.”