Mitigation of Pure Tin Risk by Tin-Lead SMT Reflow – Results of an Industry Round-Robin

Reading time ( words)


The risk associated with whisker growth from pure tin solderable terminations is fully mitigated when all of the pure tin is dissolved into tin-lead solder during SMT reflow. In order to take full advantage of this phenomenon, it is necessary to understand the conditions under which such coverage can be assured. A round robin study has been performed by IPC Task group 8-81f, during which identical sets of test vehicles were assembled at multiple locations, in accordance with IPC J-STD-001, Class 3. All of the test vehicles were analyzed to determine the extent of complete tin dissolution on a variety of component types. Results of this study are presented together with relevant conclusions and recommendations to guide high-reliability end-users on the applicability and limitations of this mitigation strategy.


Manufacturers of high reliability electronics have been working for many years to mitigate the deleterious effects of tin whisker formation. One highly effective means to suppress the growth of tin whiskers is to replace the pure tin plating with reflowed tin lead solder. (This approach is only available to manufacturers whose products are not subject to RoHS.) One approach to achieve total replacement of tin with tin lead solder is to perform a special hot solder dip process on the piece parts prior to assembly. Another approach is to fully consume the tin plating by tin lead solder during the SMT reflow process that occurs during circuit card assembly. This phenomenon of tin replacement during SMT reflow has been termed “self-mitigation,” because the components mitigate by themselves without the need of any special additional processing. Self-mitigation has many advantages over other forms of tin mitigation because it is: highly effective, adds no additional cost, and subjects the components to no additional handling.

The principal challenge to implementing self-mitigation as a standard practice is lack of confidence in the conditions under which components will reliably self-mitigate. Prior work concluded that for a specific set of process conditions, board finish, and pad design, self-mitigation can be predicted by the geometry of the component terminations[1]. It is not clear, however, how these results apply for different manufacturing processes, board finishes, and pad sizes. Without this understanding, the only reliable means for systems integrators to be confident that self-mitigation has been achieved on a given set of assemblies is to duplicate the conditions of the prior study, or to perform direct measurements on the as-received hardware.

The existence of this knowledge gap prompted the Pb-free Electronics Risk Management Council (PERM, IPC Committee 8-81) to initiate a project in 2014 under IPC task group 8-81F, to perform a study. The first phase of that study has been completed, and this report describes that study and the results to date.

Design of Experiment

The task team agreed to perform a new set of experiments involving the manufacture of identical sets of test vehicles at a number of different locations, all assembled to the requirements of IPC J-STD 001, Class 3. For simplicity, and to permit direct comparison with the results of the prior study, it was decided to use the same board layout and components from the prior study. Many potential factors for inclusion in the DOE were considered.

To read this entire article, which appeared in the September 2016 issue of SMT Magazine, click here.


Suggested Items

Passing the Test With SMTA’s Rob Boguski

09/14/2022 | Andy Shaughnessy, I-Connect007
I recently spoke with Rob Boguski, president of Fremont, California-based Datest and an SMTA vice president and board member. Rob explained why today’s test customers are asking for more information than the traditional pass/fail, offers a preview of SMTA International, and gives an update on SMTA’s planning strategy for the next five years.

Four Silver Linings in the Stormy Clouds of Pandemic, Supply Chain, and Inflation

09/14/2022 | Dr. Ronald C. Lasky, Indium Corp.
It may be difficult to see any bright spots in the current and recent economic situation. We have all experienced the devastation of the pandemic, supply chain issues, and most recently, inflation. However, as a senior technologist for an international materials supplier (Indium Corporation) and a professor of engineering at an Ivy League research university (Dartmouth College), I offer these four silver linings for those of us in the electronics industry.

Solder Paste Printing and Optimizations for Interconnecting Back Contact Cells

07/26/2022 | Narahari S Pujari and Krithika PM, MacDermid Alpha Electronics Solutions
The interdigitated back contact (IBC) is one of the methods to achieve rear contact solar cell interconnection. The contact and interconnection via rear side theoretically achieve higher efficiency by moving all the front contact grids to the rear side of the device. This results in all interconnection structures being located behind the cells, which brings two main advantages. First, there is no frontside shading of the cell by the interconnection ribbons, thus eliminating the need for trading off series resistance, losses for shading losses when using larger interconnection ribbons. Second, a more homogeneous looking frontside of the solar module enhances the aesthetics.

Copyright © 2022 I-Connect007. All rights reserved.