Siemens Advances Intelligent Custom IC Verification Platform with New, AI-powered Solido Design Environment
July 10, 2023 | SiemensEstimated reading time: 3 minutes
Siemens Digital Industries Software introduced Solido™ Design Environment software – an artificial intelligence (AI)-powered, cloud-ready integrated circuit (IC) design and verification solution that can help design teams meet and exceed increasingly aggressive power, performance, yield and reliability requirements while helping to dramatically speed time to market.
IC engineering teams must increasingly adapt to a new era of substantially higher design complexity driven by demand for compelling, highly differentiated applications across industries including wireless, automotive, high-performance computing (HPC), and internet-of-things (IoT). Siemens’ new Solido Design Environment software has been developed to help circuit designers address this challenge, delivering a unified approach for custom IC design and verification that can help designers to achieve high overall design quality and reduce time-to-market, while optimizing for these inter-dependent tradeoffs.
The newest addition to Siemens’ intelligent custom IC verification platform, the Solido Design Environment software, features AI technology and cloud deployment readiness. The Solido Design Environment software provides a single, comprehensive cockpit that handles nominal and variation-aware analysis, including SPICE-level circuit simulation setup, measurements and regressions, as well as waveforms and statistical results analysis.
Using AI technology, the solution can help users identify optimization paths to improve circuit power, performance, and area, as well as to perform production-accurate statistical yield analysis at a fraction of runtime compared to brute-force methods. It also features new Additive Learning technology that assists in significantly boosting performance for design and verification teams, producing smarter and faster AI decisions and analysis using retained AI models. With these advanced capabilities, the Solido Design Environment software can help to achieve verification accuracy up to 6 sigma and higher yield at speeds orders of magnitude faster than brute-force Monte Carlo, while helping to significantly improve coverage and accuracy.
“Semiconductor content is growing dramatically in a multitude of applications,” said Amit Gupta, vice president and general manager of the Custom IC Verification division at Siemens Digital Industries Software. "Engineering teams must adapt to higher design complexity and increasing variation effects, while meeting power, performance, area, and yield targets. With cutting-edge AI technology for signoff variation analysis seamlessly integrated into an intelligent, cloud-ready design environment, Solido Design Environment software represents a breakthrough for custom IC design, providing disruptive advantages for standard cell, memory, and analog IP design teams.”
Early customers are experiencing significant benefits. Using the new solution, SK hynix Inc., a top tier global provider of advanced memory and sensor technologies, significantly reduced the time it takes for them to go from initial design to production. “Verification accuracy and turnaround time are key factors in our design flow, as we create the next generation of memory technology,” said Mr. Do Chang-Ho, head of Computer Aided Engineering at SK hynix. “Siemens’ Solido Design Environment software has delivered brute force-accurate variation analysis coupled with powerful and easy-to-use design optimization, which has significantly reduced the time it takes for us to go from initial design to production.”
Other industry leaders on Solido Design Environment
“The Solido Design Environment software is a clear example of how Siemens EDA listens to their users and develops solutions that empower users to achieve better results,” said Sam Bagwell, director of US Design Services for Forza Silicon (AMETEK, Inc.). “Our designers use Solido Design Environment software as their simulation environment when custom designing state-of-the-art, low-noise, high-resolution, ultra-high speed CMOS image sensors for a wide range of applications including cinematography, machine vision, automotive, AR/VR, and more. We have had an outstanding experience with the solution, due to its productivity-boosting design workflows, intuitive results visualization, and excellent user support.”
“We have been using the Solido Design Environment software in our production custom design methodology, and it has exceeded our expectations,” said Patrick Camilleri, co-founder and vice president of Engineering at Crypto Quantique. “Thanks to the solution’s flexibility to adapt to our use models, we were able to integrate it into our existing methodology with ease and take advantage of its tool-assisted workflow capabilities to boost our design efficiency.”
“Solido Design Environment’s variation-aware verification capabilities have significantly benefited our design flow," said Randy Caplan, chief executive officer for Silicon Creations. "Its ability to quickly and accurately identify potential issues at high sigma, as well as to provide insights on optimizing our designs to work at a high degree of robustness, have been helpful to designers as we continue to provide world-class design IP to our customers.”
Suggested Items
Real Time with… IPC APEX EXPO 2024: Ventec Discusses New Pro-bond Family of Advanced Products
05/01/2024 | Real Time with...IPC APEX EXPOChris Hanson, Ventec's Global Head of IMS Technology, outlines the launch of four pro-bond formulas that deliver an outstanding combination of low dissipation factor (Df) with a dielectric constant (Dk) range to maximize the design window for critical PCB parameters. As Chris points out, Pro-bond is designed for low-loss, high-speed applications, while thermal-bond dissipates heat from a component through the board to a heat sink.
IPC's Vision for Empowering PCB Design Engineers
04/30/2024 | Robert Erickson, IPCAs architects of innovation, printed circuit board designers are tasked with translating increasingly complex concepts into tangible designs that power our modern world. IPC provides the necessary community, standards framework, and education to prepare these pioneers as they explore the boundaries of what’s possible, equipping engineers with the knowledge, skills, and resources required to thrive in an increasingly dynamic field.
On the Line With… Talks With Cadence Expert on SI/PI for PCB Designers
05/02/2024 | I-Connect007In “PCB 3.0: A New Design Methodology—SI/PI for PCB Designers,” subject matter expert Brad Griffin, Cadence Design Systems, discusses how an intelligent system design methodology can move some signal and power integrity decision-making into the physical design space, offering real-time feedback.
iNEMI Packaging Tech Topic Series: Role of EDA in Advanced Semiconductor Packaging
04/26/2024 | iNEMIAdvanced semiconductor packaging with heterogenous integration has made on-package integration of multiple chips a crucial part of finding alternatives to transistor scaling. Historically, EDA tools for front-end and back-end design have evolved separately; however, design complexity and the increased number of die-to-die or die-to-substrate interconnections has led to the need for EDA tools that can support integration of overall design planning, implementation, and system analysis in a single cockpit.
Cadence, TSMC Collaborate on Wide-Ranging Innovations to Transform System and Semiconductor Design
04/25/2024 | Cadence Design SystemsCadence Design Systems, Inc. and TSMC have extended their longstanding collaboration by announcing a broad range of innovative technology advancements to accelerate design, including developments ranging from 3D-IC and advanced process nodes to design IP and photonics.